Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority claimed from US27506899A external-priority Application filed by Sony Electronics Inc filed Critical Sony Electronics Inc Priority to US09/933,623 priority Critical patent/US20020143841A1/en Publication of US20020143841A1 publication Critical patent/US20020143841A1/en Status Abandoned legal-status Critical Current Links
Original Assignee Sony Electronics Inc Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Abandoned Application number US09/933,623 Inventor Aamir Farooqui Vojin Oklobdzija Farzad Chehrazi Current Assignee (The listed assignees may be inaccurate. Google Patents Multiplexer based parallel n-bit adder circuit for high speed processingĭownload PDF Info Publication number US20020143841A1 US20020143841A1 US09/933,623 US93362301A US2002143841A1 US 20020143841 A1 US20020143841 A1 US 20020143841A1 US 93362301 A US93362301 A US 93362301A US 2002143841 A1 US2002143841 A1 US 2002143841A1 Authority US United States Prior art keywords circuit bit adder carry sum Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US20020143841A1 - Multiplexer based parallel n-bit adder circuit for high speed processing US20020143841A1 - Multiplexer based parallel n-bit adder circuit for high speed processing
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